ee016e605c
* Consolidate variant scripts * Rename Marlin-local boards * Simplify variants where possible * Rename variants * CHITU_F103 and MEEB_3DP: Maple platform `platformio-build-stm32f1.py` uses the 'board' name, not 'board_build.variant' so folder names match 'board' and not `board_build.variant`.
261 lines
8.9 KiB
C++
261 lines
8.9 KiB
C++
/*
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*******************************************************************************
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* Copyright (c) 2017, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*******************************************************************************
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*/
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#include "pins_arduino.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Pin number
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// This array allows to wrap Arduino pin number(Dx or x)
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// to STM32 PinName (PX_n)
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const PinName digitalPin[] = {
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#if STM32F4X_PIN_NUM >= 64 //64 pins mcu, 51 gpio
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PC_13, //D0
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PC_14, //D1 - OSC32_IN
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PC_15, //D2 - OSC32_OUT
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PH_0, //D3 - OSC_IN
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PH_1, //D4 - OSC_OUT
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PB_2, //D5 - BOOT1
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PB_10, //D6 - 1:SPI2_SCK / I2C2_SCL / USART3_TX / TIM2_CH3
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PB_11, //D7 - 1:I2C2_SDA / USART3_RX / TIM2_CH4
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PB_12, //D8 - 1:SPI2_NSS / OTG_HS_ID
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PB_13, //D9 - 1:SPI2_SCK 2:OTG_HS_VBUS
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PB_14, //D10 - 1:SPI2_MISO / TIM12_CH1 / OTG_HS_DM
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PB_15, //D11 - SPI2_MOSI / TIM12_CH2 / OTG_HS_DP
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PC_6, //D12 - 1:TIM8_CH1 / SDIO_D6 / USART6_TX / TIM3_CH1
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PC_7, //D13 - 1:TIM8_CH2 / SDIO_D7 / USART6_RX / TIM3_CH2
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PC_8, //D14 - 1:TIM8_CH3 / SDIO_D0 / TIM3_CH3
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PC_9, //D15 - 1:TIM8_CH4 / SDIO_D1 / TIM3_CH4
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PA_8, //D16 - 1:TIM1_CH1 / I2C3_SCL / OTG_FS_SOF
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PA_9, //D17 - 1:USART1_TX / TIM1_CH2 2:OTG_FS_VBUS
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PA_10, //D18 - 1:USART1_RX / TIM1_CH3 / OTG_FS_ID
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PA_11, //D19 - 1:TIM1_CH4 / OTG_FS_DM
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PA_12, //D20 - 1:OTG_FS_DP
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PA_13, //D21 - 0:JTMS-SWDIO
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PA_14, //D22 - 0:JTCK-SWCLK
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PA_15, //D23 - 0:JTDI 1:SPI3_NSS / SPI1_NSS
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PC_10, //D24 - 1:UART4_TX / SPI3_SCK / SDIO_D2 / USART3_TX
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PC_11, //D25 - 1:UART4_RX / SPI3_MISO / SDIO_D3 / USART3_RX
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PC_12, //D26 - 1:UART5_TX / SPI3_MOSI / SDIO_CK
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PD_2, //D27 - 1:UART5_RX / SDIO_CMD
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PB_3, //D28 - 0:JTDO 1:SPI3_SCK / TIM2_CH2 / SPI1_SCK
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PB_4, //D29 - 0:NJTRST 1:SPI3_MISO / TIM3_CH1 / SPI1_MISO
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PB_5, //D30 - 1:TIM3_CH2 / SPI1_MOSI / SPI3_MOSI
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PB_6, //D31 - 1:I2C1_SCL / TIM4_CH1 / USART1_TX
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PB_7, //D32 - 1:I2C1_SDA / TIM4_CH2 / USART1_RX
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PB_8, //D33 - 1:I2C1_SCL / TIM4_CH3 / SDIO_D4 / TIM10_CH1
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PB_9, //D34 - 1:I2C1_SDA / TIM4_CH4 / SDIO_D5 / TIM11_CH1 / SPI2_NSS
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PA_0, //D35/A0 - 1:UART4_TX / TIM5_CH1 2:ADC123_IN0
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PA_1, //D36/A1 - 1:UART4_RX / TIM5_CH2 / TIM2_CH2 2:ADC123_IN1
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PA_2, //D37/A2 - 1:USART2_TX /TIM5_CH3 / TIM9_CH1 / TIM2_CH3 2:ADC123_IN2
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PA_3, //D38/A3 - 1:USART2_RX /TIM5_CH4 / TIM9_CH2 / TIM2_CH4 2:ADC123_IN3
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PA_4, //D39/A4 - NOT FT 1:SPI1_NSS / SPI3_NSS / USART2_CK 2:ADC12_IN4 / DAC_OUT1
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PA_5, //D40/A5 - NOT FT 1:SPI1_SCK 2:ADC12_IN5 / DAC_OUT2
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PA_6, //D41/A6 - 1:SPI1_MISO / TIM13_CH1 / TIM3_CH1 2:ADC12_IN6
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PA_7, //D42/A7 - 1:SPI1_MOSI / TIM14_CH1 / TIM3_CH2 2:ADC12_IN7
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PB_0, //D43/A8 - 1:TIM3_CH3 2:ADC12_IN8
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PB_1, //D44/A9 - 1:TIM3_CH4 2:ADC12_IN9
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PC_0, //D45/A10 - 1: 2:ADC123_IN10
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PC_1, //D46/A11 - 1: 2:ADC123_IN11
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PC_2, //D47/A12 - 1:SPI2_MISO 2:ADC123_IN12
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PC_3, //D48/A13 - 1:SPI2_MOSI 2:ADC123_IN13
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PC_4, //D49/A14 - 1: 2:ADC12_IN14
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PC_5, //D50/A15 - 1: 2:ADC12_IN15
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#if STM32F4X_PIN_NUM >= 144
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PF_3, //D51/A16 - 1:FSMC_A3 2:ADC3_IN9
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PF_4, //D52/A17 - 1:FSMC_A4 2:ADC3_IN14
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PF_5, //D53/A18 - 1:FSMC_A5 2:ADC3_IN15
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PF_6, //D54/A19 - 1:TIM10_CH1 2:ADC3_IN4
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PF_7, //D55/A20 - 1:TIM11_CH1 2:ADC3_IN5
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PF_8, //D56/A21 - 1:TIM13_CH1 2:ADC3_IN6
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PF_9, //D57/A22 - 1;TIM14_CH1 2:ADC3_IN7
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PF_10, //D58/A23 - 2:ADC3_IN8
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#endif
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#endif
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#if STM32F4X_PIN_NUM >= 100 //100 pins mcu, 82 gpio
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PE_2, //D59 - 1:FSMC_A23
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PE_3, //D60 - 1:FSMC_A19
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PE_4, //D61 - 1:FSMC_A20
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PE_5, //D62 - 1:FSMC_A21
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PE_6, //D63 - 1:FSMC_A22
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PE_7, //D64 - 1:FSMC_D4
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PE_8, //D65 - 1:FSMC_D5
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PE_9, //D66 - 1:FSMC_D6 / TIM1_CH1
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PE_10, //D67 - 1:FSMC_D7
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PE_11, //D68 - 1:FSMC_D8 / TIM1_CH2
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PE_12, //D69 - 1:FSMC_D9
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PE_13, //D70 - 1:FSMC_D10 / TIM1_CH3
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PE_14, //D71 - 1:FSMC_D11 / TIM1_CH4
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PE_15, //D72 - 1:FSMC_D12
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PD_8, //D73 - 1:FSMC_D13 / USART3_TX
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PD_9, //D74 - 1:FSMC_D14 / USART3_RX
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PD_10, //D75 - 1:FSMC_D15
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PD_11, //D76 - 1:FSMC_A16
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PD_12, //D77 - 1:FSMC_A17 / TIM4_CH1
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PD_13, //D78 - 1:FSMC_A18 / TIM4_CH2
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PD_14, //D79 - 1:FSMC_D0 / TIM4_CH3
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PD_15, //D80 - 1:FSMC_D1 / TIM4_CH4
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PD_0, //D81 - 1:FSMC_D2
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PD_1, //D82 - 1:FSMC_D3
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PD_3, //D83 - 1:FSMC_CLK
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PD_4, //D84 - 1:FSMC_NOE
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PD_5, //D85 - 1:USART2_TX
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PD_6, //D86 - 1:USART2_RX
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PD_7, //D87
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PE_0, //D88
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PE_1, //D89
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#endif
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#if STM32F4X_PIN_NUM >= 144 //144 pins mcu, 114 gpio
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PF_0, //D90 - 1:FSMC_A0 / I2C2_SDA
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PF_1, //D91 - 1:FSMC_A1 / I2C2_SCL
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PF_2, //D92 - 1:FSMC_A2
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PF_11, //D93
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PF_12, //D94 - 1:FSMC_A6
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PF_13, //D95 - 1:FSMC_A7
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PF_14, //D96 - 1:FSMC_A8
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PF_15, //D97 - 1:FSMC_A9
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PG_0, //D98 - 1:FSMC_A10
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PG_1, //D99 - 1:FSMC_A11
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PG_2, //D100 - 1:FSMC_A12
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PG_3, //D101 - 1:FSMC_A13
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PG_4, //D102 - 1:FSMC_A14
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PG_5, //D103 - 1:FSMC_A15
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PG_6, //D104
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PG_7, //D105
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PG_8, //D106
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PG_9, //D107 - 1:USART6_RX
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PG_10, //D108 - 1:FSMC_NE3
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PG_11, //D109
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PG_12, //D110 - 1:FSMC_NE4
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PG_13, //D111 - 1:FSMC_A24
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PG_14, //D112 - 1:FSMC_A25 / USART6_TX
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PG_15, //D113
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#endif
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#if STM32F4X_PIN_NUM >= 176 //176 pins mcu, 140 gpio
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PI_8, //D114
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PI_9, //D115
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PI_10, //D116
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PI_11, //D117
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PH_2, //D118
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PH_3, //D119
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PH_4, //D120 - 1:I2C2_SCL
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PH_5, //D121 - 1:I2C2_SDA
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PH_6, //D122 - 1:TIM12_CH1
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PH_7, //D123 - 1:I2C3_SCL
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PH_8, //D124 - 1:I2C3_SDA
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PH_9, //D125 - 1:TIM12_CH2
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PH_10, //D126 - 1:TIM5_CH1
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PH_11, //D127 - 1:TIM5_CH2
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PH_12, //D128 - 1:TIM5_CH3
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PH_13, //D129
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PH_14, //D130
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PH_15, //D131
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PI_0, //D132 - 1:TIM5_CH4 / SPI2_NSS
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PI_1, //D133 - 1:SPI2_SCK
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PI_2, //D134 - 1:TIM8_CH4 /SPI2_MISO
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PI_3, //D135 - 1:SPI2_MOS
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PI_4, //D136
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PI_5, //D137 - 1:TIM8_CH1
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PI_6, //D138 - 1:TIM8_CH2
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PI_7, //D139 - 1:TIM8_CH3
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#endif
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};
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#ifdef __cplusplus
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}
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#endif
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// ------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System Clock Configuration
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* @param None
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* @retval None
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*/
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WEAK void SystemClock_Config() {
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RCC_OscInitTypeDef RCC_OscInitStruct;
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RCC_ClkInitTypeDef RCC_ClkInitStruct;
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/**Configure the main internal regulator output voltage
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*/
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__HAL_RCC_PWR_CLK_ENABLE();
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 8;
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RCC_OscInitStruct.PLL.PLLN = 336;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = 7;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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_Error_Handler(__FILE__, __LINE__);
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}
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/**Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
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_Error_Handler(__FILE__, __LINE__);
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}
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/**Configure the Systick interrupt time
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*/
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HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / 1000);
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/**Configure the Systick
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*/
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HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
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/* SysTick_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
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}
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#ifdef __cplusplus
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}
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#endif
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