351 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			351 lines
		
	
	
		
			11 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /**********************************************************************
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| * $Id$		lpc17xx_clkpwr.c				2010-06-18
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| *//**
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| * @file		lpc17xx_clkpwr.c
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| * @brief	Contains all functions support for Clock and Power Control
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| * 			firmware library on LPC17xx
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| * @version	3.0
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| * @date		18. June. 2010
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| * @author	NXP MCU SW Application Team
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| *
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| * Copyright(C) 2010, NXP Semiconductor
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| * All rights reserved.
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| *
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| ***********************************************************************
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| * Software that is described herein is for illustrative purposes only
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| * which provides customers with programming information regarding the
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| * products. This software is supplied "AS IS" without any warranties.
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| * NXP Semiconductors assumes no responsibility or liability for the
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| * use of the software, conveys no license or title under any patent,
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| * copyright, or mask work right to the product. NXP Semiconductors
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| * reserves the right to make changes in the software without
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| * notification. NXP Semiconductors also make no representation or
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| * warranty that such application will be suitable for the specified
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| * use without further testing or modification.
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| * Permission to use, copy, modify, and distribute this software and its
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| * documentation is hereby granted, under NXP Semiconductors'
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| * relevant copyright in the software, without fee, provided that it
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| * is used in conjunction with NXP Semiconductors microcontrollers.  This
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| * copyright, permission, and disclaimer notice must appear in all copies of
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| * this code.
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| **********************************************************************/
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| 
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| /* Peripheral group ----------------------------------------------------------- */
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| /** @addtogroup CLKPWR
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|  * @{
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|  */
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| 
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| /* Includes ------------------------------------------------------------------- */
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| #include "lpc17xx_clkpwr.h"
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| 
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| 
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| /* Public Functions ----------------------------------------------------------- */
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| /** @addtogroup CLKPWR_Public_Functions
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|  * @{
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|  */
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| 
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| /*********************************************************************//**
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|  * @brief 		Set value of each Peripheral Clock Selection
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|  * @param[in]	ClkType	Peripheral Clock Selection of each type,
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|  * 				should be one of the following:
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|  *				- CLKPWR_PCLKSEL_WDT   		: WDT
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| 				- CLKPWR_PCLKSEL_TIMER0   	: Timer 0
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| 				- CLKPWR_PCLKSEL_TIMER1   	: Timer 1
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| 				- CLKPWR_PCLKSEL_UART0   	: UART 0
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| 				- CLKPWR_PCLKSEL_UART1  	: UART 1
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| 				- CLKPWR_PCLKSEL_PWM1   	: PWM 1
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| 				- CLKPWR_PCLKSEL_I2C0   	: I2C 0
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| 				- CLKPWR_PCLKSEL_SPI   		: SPI
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| 				- CLKPWR_PCLKSEL_SSP1   	: SSP 1
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| 				- CLKPWR_PCLKSEL_DAC   		: DAC
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| 				- CLKPWR_PCLKSEL_ADC   		: ADC
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| 				- CLKPWR_PCLKSEL_CAN1  		: CAN 1
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| 				- CLKPWR_PCLKSEL_CAN2  		: CAN 2
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| 				- CLKPWR_PCLKSEL_ACF   		: ACF
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| 				- CLKPWR_PCLKSEL_QEI 		: QEI
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| 				- CLKPWR_PCLKSEL_PCB   		: PCB
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| 				- CLKPWR_PCLKSEL_I2C1   	: I2C 1
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| 				- CLKPWR_PCLKSEL_SSP0   	: SSP 0
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| 				- CLKPWR_PCLKSEL_TIMER2   	: Timer 2
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| 				- CLKPWR_PCLKSEL_TIMER3   	: Timer 3
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| 				- CLKPWR_PCLKSEL_UART2   	: UART 2
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| 				- CLKPWR_PCLKSEL_UART3   	: UART 3
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| 				- CLKPWR_PCLKSEL_I2C2   	: I2C 2
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| 				- CLKPWR_PCLKSEL_I2S   		: I2S
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| 				- CLKPWR_PCLKSEL_RIT   		: RIT
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| 				- CLKPWR_PCLKSEL_SYSCON   	: SYSCON
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| 				- CLKPWR_PCLKSEL_MC 		: MC
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| 
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|  * @param[in]	DivVal	Value of divider, should be:
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|  * 				- CLKPWR_PCLKSEL_CCLK_DIV_4 : PCLK_peripheral = CCLK/4
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|  * 				- CLKPWR_PCLKSEL_CCLK_DIV_1 : PCLK_peripheral = CCLK/1
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|  *				- CLKPWR_PCLKSEL_CCLK_DIV_2 : PCLK_peripheral = CCLK/2
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|  *
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|  * @return none
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|  **********************************************************************/
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| void CLKPWR_SetPCLKDiv (uint32_t ClkType, uint32_t DivVal)
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| {
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| 	uint32_t bitpos;
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| 
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| 	bitpos = (ClkType < 32) ? (ClkType) : (ClkType - 32);
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| 
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| 	/* PCLKSEL0 selected */
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| 	if (ClkType < 32)
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| 	{
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| 		/* Clear two bit at bit position */
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| 		LPC_SC->PCLKSEL0 &= (~(CLKPWR_PCLKSEL_BITMASK(bitpos)));
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| 
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| 		/* Set two selected bit */
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| 		LPC_SC->PCLKSEL0 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
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| 	}
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| 	/* PCLKSEL1 selected */
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| 	else
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| 	{
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| 		/* Clear two bit at bit position */
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| 		LPC_SC->PCLKSEL1 &= ~(CLKPWR_PCLKSEL_BITMASK(bitpos));
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| 
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| 		/* Set two selected bit */
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| 		LPC_SC->PCLKSEL1 |= (CLKPWR_PCLKSEL_SET(bitpos, DivVal));
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| 	}
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| }
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| 
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| 
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| /*********************************************************************//**
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|  * @brief		Get current value of each Peripheral Clock Selection
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|  * @param[in]	ClkType	Peripheral Clock Selection of each type,
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|  * 				should be one of the following:
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|  *				- CLKPWR_PCLKSEL_WDT   		: WDT
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| 				- CLKPWR_PCLKSEL_TIMER0   	: Timer 0
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| 				- CLKPWR_PCLKSEL_TIMER1   	: Timer 1
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| 				- CLKPWR_PCLKSEL_UART0   	: UART 0
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| 				- CLKPWR_PCLKSEL_UART1  	: UART 1
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| 				- CLKPWR_PCLKSEL_PWM1   	: PWM 1
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| 				- CLKPWR_PCLKSEL_I2C0   	: I2C 0
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| 				- CLKPWR_PCLKSEL_SPI   		: SPI
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| 				- CLKPWR_PCLKSEL_SSP1   	: SSP 1
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| 				- CLKPWR_PCLKSEL_DAC   		: DAC
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| 				- CLKPWR_PCLKSEL_ADC   		: ADC
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| 				- CLKPWR_PCLKSEL_CAN1  		: CAN 1
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| 				- CLKPWR_PCLKSEL_CAN2  		: CAN 2
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| 				- CLKPWR_PCLKSEL_ACF   		: ACF
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| 				- CLKPWR_PCLKSEL_QEI 		: QEI
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| 				- CLKPWR_PCLKSEL_PCB   		: PCB
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| 				- CLKPWR_PCLKSEL_I2C1   	: I2C 1
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| 				- CLKPWR_PCLKSEL_SSP0   	: SSP 0
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| 				- CLKPWR_PCLKSEL_TIMER2   	: Timer 2
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| 				- CLKPWR_PCLKSEL_TIMER3   	: Timer 3
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| 				- CLKPWR_PCLKSEL_UART2   	: UART 2
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| 				- CLKPWR_PCLKSEL_UART3   	: UART 3
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| 				- CLKPWR_PCLKSEL_I2C2   	: I2C 2
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| 				- CLKPWR_PCLKSEL_I2S   		: I2S
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| 				- CLKPWR_PCLKSEL_RIT   		: RIT
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| 				- CLKPWR_PCLKSEL_SYSCON   	: SYSCON
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| 				- CLKPWR_PCLKSEL_MC 		: MC
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| 
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|  * @return		Value of Selected Peripheral Clock Selection
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|  **********************************************************************/
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| uint32_t CLKPWR_GetPCLKSEL (uint32_t ClkType)
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| {
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| 	uint32_t bitpos, retval;
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| 
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| 	if (ClkType < 32)
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| 	{
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| 		bitpos = ClkType;
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| 		retval = LPC_SC->PCLKSEL0;
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| 	}
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| 	else
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| 	{
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| 		bitpos = ClkType - 32;
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| 		retval = LPC_SC->PCLKSEL1;
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| 	}
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| 
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| 	retval = CLKPWR_PCLKSEL_GET(bitpos, retval);
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| 	return retval;
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| }
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| 
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Get current value of each Peripheral Clock
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|  * @param[in]	ClkType	Peripheral Clock Selection of each type,
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|  * 				should be one of the following:
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|  *				- CLKPWR_PCLKSEL_WDT   		: WDT
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| 				- CLKPWR_PCLKSEL_TIMER0   	: Timer 0
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| 				- CLKPWR_PCLKSEL_TIMER1   	: Timer 1
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| 				- CLKPWR_PCLKSEL_UART0   	: UART 0
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| 				- CLKPWR_PCLKSEL_UART1  	: UART 1
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| 				- CLKPWR_PCLKSEL_PWM1   	: PWM 1
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| 				- CLKPWR_PCLKSEL_I2C0   	: I2C 0
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| 				- CLKPWR_PCLKSEL_SPI   		: SPI
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| 				- CLKPWR_PCLKSEL_SSP1   	: SSP 1
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| 				- CLKPWR_PCLKSEL_DAC   		: DAC
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| 				- CLKPWR_PCLKSEL_ADC   		: ADC
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| 				- CLKPWR_PCLKSEL_CAN1  		: CAN 1
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| 				- CLKPWR_PCLKSEL_CAN2  		: CAN 2
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| 				- CLKPWR_PCLKSEL_ACF   		: ACF
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| 				- CLKPWR_PCLKSEL_QEI 		: QEI
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| 				- CLKPWR_PCLKSEL_PCB   		: PCB
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| 				- CLKPWR_PCLKSEL_I2C1   	: I2C 1
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| 				- CLKPWR_PCLKSEL_SSP0   	: SSP 0
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| 				- CLKPWR_PCLKSEL_TIMER2   	: Timer 2
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| 				- CLKPWR_PCLKSEL_TIMER3   	: Timer 3
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| 				- CLKPWR_PCLKSEL_UART2   	: UART 2
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| 				- CLKPWR_PCLKSEL_UART3   	: UART 3
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| 				- CLKPWR_PCLKSEL_I2C2   	: I2C 2
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| 				- CLKPWR_PCLKSEL_I2S   		: I2S
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| 				- CLKPWR_PCLKSEL_RIT   		: RIT
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| 				- CLKPWR_PCLKSEL_SYSCON   	: SYSCON
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| 				- CLKPWR_PCLKSEL_MC 		: MC
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| 
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|  * @return		Value of Selected Peripheral Clock
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|  **********************************************************************/
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| uint32_t CLKPWR_GetPCLK (uint32_t ClkType)
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| {
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| 	uint32_t retval, div;
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| 
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| 	retval = SystemCoreClock;
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| 	div = CLKPWR_GetPCLKSEL(ClkType);
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| 
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| 	switch (div)
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| 	{
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| 	case 0:
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| 		div = 4;
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| 		break;
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| 
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| 	case 1:
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| 		div = 1;
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| 		break;
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| 
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| 	case 2:
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| 		div = 2;
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| 		break;
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| 
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| 	case 3:
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| 		div = 8;
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| 		break;
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| 	}
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| 	retval /= div;
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| 
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| 	return retval;
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| }
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| 
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Configure power supply for each peripheral according to NewState
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|  * @param[in]	PPType	Type of peripheral used to enable power,
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|  *     					should be one of the following:
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|  *     			-  CLKPWR_PCONP_PCTIM0 		: Timer 0
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| 				-  CLKPWR_PCONP_PCTIM1 		: Timer 1
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| 				-  CLKPWR_PCONP_PCUART0  	: UART 0
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| 				-  CLKPWR_PCONP_PCUART1   	: UART 1
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| 				-  CLKPWR_PCONP_PCPWM1 		: PWM 1
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| 				-  CLKPWR_PCONP_PCI2C0 		: I2C 0
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| 				-  CLKPWR_PCONP_PCSPI   	: SPI
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| 				-  CLKPWR_PCONP_PCRTC   	: RTC
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| 				-  CLKPWR_PCONP_PCSSP1 		: SSP 1
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| 				-  CLKPWR_PCONP_PCAD   		: ADC
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| 				-  CLKPWR_PCONP_PCAN1   	: CAN 1
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| 				-  CLKPWR_PCONP_PCAN2   	: CAN 2
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| 				-  CLKPWR_PCONP_PCGPIO 		: GPIO
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| 				-  CLKPWR_PCONP_PCRIT 		: RIT
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| 				-  CLKPWR_PCONP_PCMC 		: MC
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| 				-  CLKPWR_PCONP_PCQEI 		: QEI
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| 				-  CLKPWR_PCONP_PCI2C1   	: I2C 1
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| 				-  CLKPWR_PCONP_PCSSP0 		: SSP 0
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| 				-  CLKPWR_PCONP_PCTIM2 		: Timer 2
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| 				-  CLKPWR_PCONP_PCTIM3 		: Timer 3
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| 				-  CLKPWR_PCONP_PCUART2  	: UART 2
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| 				-  CLKPWR_PCONP_PCUART3   	: UART 3
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| 				-  CLKPWR_PCONP_PCI2C2 		: I2C 2
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| 				-  CLKPWR_PCONP_PCI2S   	: I2S
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| 				-  CLKPWR_PCONP_PCGPDMA   	: GPDMA
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| 				-  CLKPWR_PCONP_PCENET 		: Ethernet
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| 				-  CLKPWR_PCONP_PCUSB   	: USB
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|  *
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|  * @param[in]	NewState	New state of Peripheral Power, should be:
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|  * 				- ENABLE	: Enable power for this peripheral
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|  * 				- DISABLE	: Disable power for this peripheral
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|  *
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|  * @return none
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|  **********************************************************************/
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| void CLKPWR_ConfigPPWR (uint32_t PPType, FunctionalState NewState)
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| {
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| 	if (NewState == ENABLE)
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| 	{
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| 		LPC_SC->PCONP |= PPType & CLKPWR_PCONP_BITMASK;
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| 	}
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| 	else if (NewState == DISABLE)
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| 	{
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| 		LPC_SC->PCONP &= (~PPType) & CLKPWR_PCONP_BITMASK;
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| 	}
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| }
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Enter Sleep mode with co-operated instruction by the Cortex-M3.
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|  * @param[in]	None
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|  * @return		None
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|  **********************************************************************/
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| void CLKPWR_Sleep(void)
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| {
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| 	LPC_SC->PCON = 0x00;
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| 	/* Sleep Mode*/
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| 	__WFI();
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| }
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Enter Deep Sleep mode with co-operated instruction by the Cortex-M3.
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|  * @param[in]	None
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|  * @return		None
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|  **********************************************************************/
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| void CLKPWR_DeepSleep(void)
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| {
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|     /* Deep-Sleep Mode, set SLEEPDEEP bit */
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| 	SCB->SCR = 0x4;
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| 	LPC_SC->PCON = 0x00;
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| 	/* Deep Sleep Mode*/
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| 	__WFI();
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| }
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Enter Power Down mode with co-operated instruction by the Cortex-M3.
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|  * @param[in]	None
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|  * @return		None
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|  **********************************************************************/
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| void CLKPWR_PowerDown(void)
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| {
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|     /* Deep-Sleep Mode, set SLEEPDEEP bit */
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| 	SCB->SCR = 0x4;
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| 	LPC_SC->PCON = 0x01;
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| 	/* Power Down Mode*/
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| 	__WFI();
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| }
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| 
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| 
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| /*********************************************************************//**
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|  * @brief 		Enter Deep Power Down mode with co-operated instruction by the Cortex-M3.
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|  * @param[in]	None
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|  * @return		None
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|  **********************************************************************/
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| void CLKPWR_DeepPowerDown(void)
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| {
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|     /* Deep-Sleep Mode, set SLEEPDEEP bit */
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| 	SCB->SCR = 0x4;
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| 	LPC_SC->PCON = 0x03;
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| 	/* Deep Power Down Mode*/
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| 	__WFI();
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| }
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| 
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| /**
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|  * @}
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|  */
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| 
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| /**
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|  * @}
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|  */
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| 
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| /* --------------------------------- End Of File ------------------------------ */
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