/****************************************************************************** * The MIT License * * Copyright (c) 2011 LeafLabs, LLC. * * Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, copy, * modify, merge, publish, distribute, sublicense, and/or sell copies * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. *****************************************************************************/ /** * @file maple_RET6.h * @author Marti Bolivar <mbolivar@leaflabs.com> * @brief Private include file for Maple RET6 Edition in boards.h * * See maple.h for more information on these definitions. */ #ifndef _BOARDS_GENERIC_STM32F103Z_H_ #define _BOARDS_GENERIC_STM32F103Z_H_ /* A few of these values will seem strange given that it's a * high-density board. */ #define CYCLES_PER_MICROSECOND 72 #define SYSTICK_RELOAD_VAL (F_CPU/1000) - 1 /* takes a cycle to reload */ // USARTS #define BOARD_NR_USARTS 5 #define BOARD_USART1_TX_PIN PA9 #define BOARD_USART1_RX_PIN PA10 #define BOARD_USART2_TX_PIN PA2 #define BOARD_USART2_RX_PIN PA3 #define BOARD_USART3_TX_PIN PB10 #define BOARD_USART3_RX_PIN PB11 #define BOARD_USART4_TX_PIN PC10 #define BOARD_USART4_RX_PIN PC11 #define BOARD_USART5_TX_PIN PC12 #define BOARD_USART5_RX_PIN PD2 /* Note: * * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but * leave the definitions so as not to clutter things up. This is only * OK since RET6 Ed. is specifically advertised as a beta board. */ #define BOARD_NR_SPI 3 #define BOARD_SPI1_NSS_PIN PA4 #define BOARD_SPI1_SCK_PIN PA5 #define BOARD_SPI1_MISO_PIN PA6 #define BOARD_SPI1_MOSI_PIN PA7 #define BOARD_SPI2_NSS_PIN PB12 #define BOARD_SPI2_SCK_PIN PB13 #define BOARD_SPI2_MISO_PIN PB14 #define BOARD_SPI2_MOSI_PIN PB15 #define BOARD_SPI3_NSS_PIN PA15 #define BOARD_SPI3_SCK_PIN PB3 #define BOARD_SPI3_MISO_PIN PB4 #define BOARD_SPI3_MOSI_PIN PB5 /* GPIO A to E = 5 * 16 - BOOT1 not used = 79*/ #define BOARD_NR_GPIO_PINS 112 /* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which * isn't broken out to a header and is thus unusable for PWM. */ #define BOARD_NR_PWM_PINS 19 #define BOARD_NR_ADC_PINS 16 #define BOARD_NR_USED_PINS 7 #define BOARD_JTMS_SWDIO_PIN 39 #define BOARD_JTCK_SWCLK_PIN 40 #define BOARD_JTDI_PIN 41 #define BOARD_JTDO_PIN 42 #define BOARD_NJTRST_PIN 43 /* USB configuration. BOARD_USB_DISC_DEV is the GPIO port containing * the USB_DISC pin, and BOARD_USB_DISC_BIT is that pin's bit. */ #define BOARD_USB_DISC_DEV GPIOC #define BOARD_USB_DISC_BIT 12 /* * SDIO Pins */ #define BOARD_SDIO_D0 PC8 #define BOARD_SDIO_D1 PC9 #define BOARD_SDIO_D2 PC10 #define BOARD_SDIO_D3 PC11 #define BOARD_SDIO_CLK PC12 #define BOARD_SDIO_CMD PD2 /* Pin aliases: these give the GPIO port/bit for each pin as an * enum. These are optional, but recommended. They make it easier to * write code using low-level GPIO functionality. */ enum { PA0,PA1,PA2,PA3,PA4,PA5,PA6,PA7,PA8,PA9,PA10,PA11,PA12,PA13,PA14,PA15, PB0,PB1,PB2,PB3,PB4,PB5,PB6,PB7,PB8,PB9,PB10,PB11,PB12,PB13,PB14,PB15, PC0,PC1,PC2,PC3,PC4,PC5,PC6,PC7,PC8,PC9,PC10,PC11,PC12,PC13,PC14,PC15, PD0,PD1,PD2,PD3,PD4,PD5,PD6,PD7,PD8,PD9,PD10,PD11,PD12,PD13,PD14,PD15, PE0,PE1,PE2,PE3,PE4,PE5,PE6,PE7,PE8,PE9,PE10,PE11,PE12,PE13,PE14,PE15, PF0,PF1,PF2,PF3,PF4,PF5,PF6,PF7,PF8,PF9,PF10,PF11,PF12,PF13,PF14,PF15, PG0,PG1,PG2,PG3,PG4,PG5,PG6,PG7,PG8,PG9,PG10,PG11,PG12,PG13,PG14,PG15 };/* Note PB2 is skipped as this is Boot1 and is not going to be much use as its likely to be pulled permanently low */ /* #define PA0 0 #define PA1 1 #define PA2 2 #define PA3 3 #define PA4 4 #define PA5 5 #define PA6 6 #define PA7 7 #define PA8 8 #define PA9 9 #define PA10 10 #define PA11 11 #define PA12 12 #define PA13 13 #define PA14 14 #define PA15 15 #define PB0 16 #define PB1 17 #define PB2 18 #define PB3 19 #define PB4 20 #define PB5 21 #define PB6 22 #define PB7 23 #define PB8 24 #define PB9 25 #define PB10 26 #define PB11 27 #define PB12 28 #define PB13 29 #define PB14 30 #define PB15 31 #define PC0 32 #define PC1 33 #define PC2 34 #define PC3 35 #define PC4 36 #define PC5 37 #define PC6 38 #define PC7 39 #define PC8 40 #define PC9 41 #define PC10 42 #define PC11 43 #define PC12 44 #define PC13 45 #define PC14 46 #define PC15 47 #define PD0 48 #define PD1 49 #define PD2 50 #define PD3 51 #define PD4 52 #define PD5 53 #define PD6 54 #define PD7 55 #define PD8 56 #define PD9 57 #define PD10 58 #define PD11 59 #define PD12 60 #define PD13 61 #define PD14 62 #define PD15 63 #define PE0 64 #define PE1 65 #define PE2 66 #define PE3 67 #define PE4 68 #define PE5 69 #define PE6 70 #define PE7 71 #define PE8 72 #define PE9 73 #define PE10 74 #define PE11 75 #define PE12 76 #define PE13 77 #define PE14 78 #define PE15 79 #define PF0 80 #define PF1 81 #define PF2 82 #define PF3 83 #define PF4 84 #define PF5 85 #define PF6 86 #define PF7 87 #define PF8 88 #define PF9 89 #define PF10 90 #define PF11 91 #define PF12 92 #define PF13 93 #define PF14 94 #define PF15 95 #define PG0 96 #define PG1 97 #define PG2 98 #define PG3 99 #define PG4 100 #define PG5 101 #define PG6 102 #define PG7 103 #define PG8 104 #define PG9 105 #define PG10 106 #define PG11 107 #define PG12 108 #define PG13 109 #define PG14 110 #define PG15 111 */ #endif