Merge pull request #8860 from Bob-the-Kuhn/2.0.x-DUE-RRDFGSC
[2.0.x] DUE - update for Reprap Discount Full Graphic Smart Controller2.0.x
commit
db32c185ae
@ -0,0 +1,204 @@
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/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016, 2017 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*
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based on u8g_com_st7920_hw_spi.c
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Universal 8bit Graphics Library
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Copyright (c) 2011, olikraus@gmail.com
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice, this list
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of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice, this
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list of conditions and the following disclaimer in the documentation and/or other
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materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifdef __SAM3X8E__
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#include <U8glib.h>
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#include <Arduino.h>
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#include "../../core/macros.h"
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void u8g_SetPIOutput_DUE(u8g_t *u8g, uint8_t pin_index) {
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PIO_Configure(g_APinDescription[u8g->pin_list[pin_index]].pPort, PIO_OUTPUT_1,
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g_APinDescription[u8g->pin_list[pin_index]].ulPin, g_APinDescription[u8g->pin_list[pin_index]].ulPinConfiguration); // OUTPUT
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}
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void u8g_SetPILevel_DUE(u8g_t *u8g, uint8_t pin_index, uint8_t level) {
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volatile Pio* port = g_APinDescription[u8g->pin_list[pin_index]].pPort;
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uint32_t mask = g_APinDescription[u8g->pin_list[pin_index]].ulPin;
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if (level) port->PIO_SODR = mask;
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else port->PIO_CODR = mask;
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}
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#define nop() __asm__ __volatile__("nop;\n\t":::)
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void __delay_4cycles(uint32_t cy) __attribute__ ((weak));
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FORCE_INLINE void __delay_4cycles(uint32_t cy) { // +1 cycle
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#if ARCH_PIPELINE_RELOAD_CYCLES<2
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#define EXTRA_NOP_CYCLES "nop"
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#else
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#define EXTRA_NOP_CYCLES ""
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#endif
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__asm__ __volatile__(
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".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax
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"loop%=:" "\n\t"
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" subs %[cnt],#1" "\n\t"
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EXTRA_NOP_CYCLES "\n\t"
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" bne loop%=" "\n\t"
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: [cnt]"+r"(cy) // output: +r means input+output
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: // input:
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: "cc" // clobbers:
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);
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}
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Pio *SCK_pPio, *MOSI_pPio;
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uint32_t SCK_dwMask, MOSI_dwMask;
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static void spiSend_sw_DUE(uint8_t val) { // 800KHz
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for (uint8_t i = 0; i < 8; i++) {
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if (val & 0x80)
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MOSI_pPio->PIO_SODR = MOSI_dwMask;
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else
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MOSI_pPio->PIO_CODR = MOSI_dwMask;
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val = val << 1;
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__delay_4cycles(2);
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SCK_pPio->PIO_SODR = SCK_dwMask;
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__delay_4cycles(22);
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SCK_pPio->PIO_CODR = SCK_dwMask;
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}
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}
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static uint8_t rs_last_state = 255;
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static void u8g_com_DUE_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
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uint8_t i;
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if ( rs != rs_last_state) { // time to send a command/data byte
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rs_last_state = rs;
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if ( rs == 0 )
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/* command */
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spiSend_sw_DUE(0x0f8);
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else
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/* data */
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spiSend_sw_DUE(0x0fa);
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for( i = 0; i < 4; i++ ) // give the controller some time to process the data
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u8g_10MicroDelay(); // 2 is bad, 3 is OK, 4 is safe
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}
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spiSend_sw_DUE(val & 0x0f0);
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spiSend_sw_DUE(val << 4);
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}
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uint8_t u8g_com_HAL_DUE_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr) {
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switch (msg) {
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case U8G_COM_MSG_INIT:
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SCK_pPio = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].pPort;
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SCK_dwMask = g_APinDescription[u8g->pin_list[U8G_PI_SCK]].ulPin;
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MOSI_pPio = g_APinDescription[u8g->pin_list[U8G_PI_MOSI]].pPort;
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MOSI_dwMask = g_APinDescription[u8g->pin_list[U8G_PI_MOSI]].ulPin;
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u8g_SetPILevel_DUE(u8g, U8G_PI_CS, 0);
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u8g_SetPIOutput_DUE(u8g, U8G_PI_CS);
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u8g_SetPILevel_DUE(u8g, U8G_PI_SCK, 0);
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u8g_SetPIOutput_DUE(u8g, U8G_PI_SCK);
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u8g_SetPILevel_DUE(u8g, U8G_PI_MOSI, 0);
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u8g_SetPILevel_DUE(u8g, U8G_PI_MOSI, 1);
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u8g_SetPIOutput_DUE(u8g, U8G_PI_MOSI);
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u8g_Delay(5);
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u8g->pin_list[U8G_PI_A0_STATE] = 0; /* inital RS state: command mode */
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break;
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case U8G_COM_MSG_STOP:
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break;
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case U8G_COM_MSG_RESET:
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if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_RESET]) u8g_SetPILevel_DUE(u8g, U8G_PI_RESET, arg_val);
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break;
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case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
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u8g->pin_list[U8G_PI_A0_STATE] = arg_val;
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break;
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case U8G_COM_MSG_CHIP_SELECT:
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if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_CS])
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u8g_SetPILevel_DUE(u8g, U8G_PI_CS, arg_val); //note: the st7920 has an active high chip select
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break;
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case U8G_COM_MSG_WRITE_BYTE:
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], arg_val);
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break;
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case U8G_COM_MSG_WRITE_SEQ: {
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uint8_t *ptr = (uint8_t*) arg_ptr;
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while (arg_val > 0) {
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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arg_val--;
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}
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}
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break;
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case U8G_COM_MSG_WRITE_SEQ_P: {
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uint8_t *ptr = (uint8_t*) arg_ptr;
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while (arg_val > 0) {
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u8g_com_DUE_st7920_write_byte_sw_spi(u8g->pin_list[U8G_PI_A0_STATE], *ptr++);
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arg_val--;
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}
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}
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break;
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}
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return 1;
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}
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#pragma GCC reset_options
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#endif //ARDUINO_ARCH_SAM
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@ -1,276 +0,0 @@
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/**
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* Marlin 3D Printer Firmware
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* Copyright (C) 2016 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
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*
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* Based on Sprinter and grbl.
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* Copyright (C) 2011 Camiel Gubbels / Erik van der Zalm
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation, either version 3 of the License, or
|
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
|
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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/*
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* PLEASE NOTE >>>
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* We need our custom implementation for Software SPI, as the default implementation
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* of U8GLIB, when running in an ARM based board, is too fast and the display will not
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* recognize commands and/or data at such speeds. This implementation autoderives the
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* required delays to get the maximum possible performance by using the F_CPU macro that
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* specifies the CPU speed. According to the ST7920 datasheet, the maximum SCLK is 1MHz.
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*/
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#ifndef ULCDST7920_SWSPI_H
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#define ULCDST7920_SWSPI_H
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#include "../../inc/MarlinConfig.h"
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#if ENABLED(U8GLIB_ST7920)
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#include <U8glib.h>
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#include "HAL_LCD_com_defines.h"
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#define ST7920_CLK_PIN LCD_PINS_D4
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#define ST7920_DAT_PIN LCD_PINS_ENABLE
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#define ST7920_CS_PIN LCD_PINS_RS
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//#define PAGE_HEIGHT 8 //128 byte framebuffer
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#define PAGE_HEIGHT 16 //256 byte framebuffer
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//#define PAGE_HEIGHT 32 //512 byte framebuffer
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#define LCD_PIXEL_WIDTH 128
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#define LCD_PIXEL_HEIGHT 64
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//set optimization so ARDUINO optimizes this file
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#pragma GCC optimize (3)
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/* ---------------- Delay Cycles routine -------------- */
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#ifdef __arm__
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/* https://blueprints.launchpad.net/gcc-arm-embedded/+spec/delay-cycles */
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#define nop() __asm__ __volatile__("nop;\n\t":::)
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FORCE_INLINE static void __delay_4cycles(uint32_t cy) { // +1 cycle
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#if ARCH_PIPELINE_RELOAD_CYCLES<2
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#define EXTRA_NOP_CYCLES "nop"
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#else
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#define EXTRA_NOP_CYCLES ""
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#endif
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__asm__ __volatile__(
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".syntax unified" "\n\t" // is to prevent CM0,CM1 non-unified syntax
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"loop%=:" "\n\t"
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" subs %[cnt],#1" "\n\t"
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EXTRA_NOP_CYCLES "\n\t"
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" bne loop%=" "\n\t"
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: [cnt]"+r"(cy) // output: +r means input+output
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: // input:
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: "cc" // clobbers:
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);
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}
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FORCE_INLINE static void DELAY_CYCLES(uint32_t x) {
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if (__builtin_constant_p(x)) {
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#define MAXNOPS 4
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if (x <= (MAXNOPS)) {
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switch(x) { case 4: nop(); case 3: nop(); case 2: nop(); case 1: nop(); }
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}
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else { // because of +1 cycle inside delay_4cycles
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const uint32_t rem = (x - 1) % (MAXNOPS);
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switch(rem) { case 3: nop(); case 2: nop(); case 1: nop(); }
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if ((x = (x - 1) / (MAXNOPS)))
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__delay_4cycles(x); // if need more then 4 nop loop is more optimal
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}
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}
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else
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__delay_4cycles(x / 4);
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}
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#ifdef __TEST_DELAY
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void calibrateTimer() {
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// Use DWT to calibrate cycles
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uint32_t count = 0;
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// addresses of registers
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volatile uint32_t *DWT_CONTROL = (uint32_t *)0xE0001000,
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*DWT_CYCCNT = (uint32_t *)0xE0001004,
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*DEMCR = (uint32_t *)0xE000EDFC;
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cli();
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// enable the use DWT
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*DEMCR = *DEMCR | 0x01000000;
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// Reset cycle counter
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*DWT_CYCCNT = 0;
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// enable cycle counter
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*DWT_CONTROL = *DWT_CONTROL | 1;
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// Perform a delay of 10000 cycles
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DELAY_CYCLES(10000U);
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// number of cycles stored in count variable
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count = *DWT_CYCCNT;
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sei();
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SERIAL_ECHO_START();
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SERIAL_ECHOLNPAIR("calibrated Cycles: ", (int)count);
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}
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#endif // __TEST_DELAY
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#elif defined(__AVR__)
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#define DELAY_CYCLES(cycles) __builtin_avr_delay_cycles(cycles)
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#else
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#error "DELAY_CYCLES not implemented for this architecture."
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#endif
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/* ---------------- Delay in nanoseconds and in microseconds */
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#define DELAY_NS(x) DELAY_CYCLES( (x) * (F_CPU/1000000) / 1000)
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#define DELAY_US(x) DELAY_CYCLES( (x) * (F_CPU/1000000))
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/* ---------------- ST7920 commands ------------------------ */
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#ifdef __arm__
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/* ARM: Plain implementation is more than enough */
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static void ST7920_SWSPI_SND_8BIT(uint8_t val) {
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uint8_t n = 8;
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do {
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WRITE(ST7920_CLK_PIN, LOW);
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WRITE(ST7920_DAT_PIN, val & 0x80);
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DELAY_NS(700); /* RE-ARM requires 700ns to be stable, RAMPS4DUE works with 500ns */
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WRITE(ST7920_CLK_PIN, HIGH);
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DELAY_NS(700); /* RE-ARM requires 700ns to be stable, RAMPS4DUE works with 500ns */
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val <<= 1;
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} while (--n);
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}
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#else // !ARM
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/* AVR: Unrolling loop makes sense */
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#define ST7920_SND_BIT(nr) \
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WRITE(ST7920_CLK_PIN, LOW); \
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WRITE(ST7920_DAT_PIN, TEST(val, nr)); \
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DELAY_NS(700); \
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WRITE(ST7920_CLK_PIN, HIGH); \
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DELAY_NS(700);
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static void ST7920_SWSPI_SND_8BIT(const uint8_t val) {
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ST7920_SND_BIT(7); // MSBit
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ST7920_SND_BIT(6); //
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ST7920_SND_BIT(5); //
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ST7920_SND_BIT(4); //
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ST7920_SND_BIT(3); //
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ST7920_SND_BIT(2); //
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ST7920_SND_BIT(1); //
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ST7920_SND_BIT(0); // LSBit
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}
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||||
|
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#endif // !ARM
|
||||
|
||||
#define ST7920_CS() { WRITE(ST7920_CS_PIN,1); DELAY_NS(200); }
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#define ST7920_NCS() { WRITE(ST7920_CS_PIN,0); }
|
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#define ST7920_SET_CMD() { ST7920_SWSPI_SND_8BIT(0xF8); DELAY_US(3); }
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#define ST7920_SET_DAT() { ST7920_SWSPI_SND_8BIT(0xFA); DELAY_US(3); }
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#define ST7920_WRITE_BYTE(a) { ST7920_SWSPI_SND_8BIT((uint8_t)((a)&0xF0u)); ST7920_SWSPI_SND_8BIT((uint8_t)((a)<<4u)); DELAY_US(3); }
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#define ST7920_WRITE_BYTES(p,l) { for (uint8_t i = l + 1; --i;) { ST7920_SWSPI_SND_8BIT(*p&0xF0); ST7920_SWSPI_SND_8BIT(*p<<4); p++; } DELAY_US(3); }
|
||||
|
||||
|
||||
uint8_t u8g_dev_st7920_custom_sw_spi_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) {
|
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|
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uint8_t i, y;
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switch (msg) {
|
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case U8G_DEV_MSG_INIT: {
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||||
|
||||
/* Set to output and write */
|
||||
OUT_WRITE(ST7920_CS_PIN, LOW);
|
||||
OUT_WRITE(ST7920_DAT_PIN, LOW);
|
||||
OUT_WRITE(ST7920_CLK_PIN, HIGH);
|
||||
|
||||
ST7920_CS();
|
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u8g_Delay(120); //initial delay for boot up
|
||||
|
||||
ST7920_SET_CMD();
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ST7920_WRITE_BYTE(0x08); //display off, cursor+blink off
|
||||
ST7920_WRITE_BYTE(0x01); //clear CGRAM ram
|
||||
u8g_Delay(15); //delay for CGRAM clear
|
||||
ST7920_WRITE_BYTE(0x3E); //extended mode + GDRAM active
|
||||
for (y = 0; y < (LCD_PIXEL_HEIGHT) / 2; y++) { //clear GDRAM
|
||||
ST7920_WRITE_BYTE(0x80 | y); //set y
|
||||
ST7920_WRITE_BYTE(0x80); //set x = 0
|
||||
ST7920_SET_DAT();
|
||||
for (i = 0; i < 2 * (LCD_PIXEL_WIDTH) / 8; i++) //2x width clears both segments
|
||||
ST7920_WRITE_BYTE(0);
|
||||
ST7920_SET_CMD();
|
||||
}
|
||||
|
||||
ST7920_WRITE_BYTE(0x0C); //display on, cursor+blink off
|
||||
ST7920_NCS();
|
||||
}
|
||||
break;
|
||||
|
||||
case U8G_DEV_MSG_STOP:
|
||||
break;
|
||||
|
||||
case U8G_DEV_MSG_PAGE_NEXT: {
|
||||
u8g_pb_t* pb = (u8g_pb_t*)(dev->dev_mem);
|
||||
y = pb->p.page_y0;
|
||||
uint8_t* ptr = (uint8_t*)pb->buf;
|
||||
|
||||
ST7920_CS();
|
||||
for (i = 0; i < PAGE_HEIGHT; i ++) {
|
||||
ST7920_SET_CMD();
|
||||
if (y < 32) {
|
||||
ST7920_WRITE_BYTE(0x80 | y); //y
|
||||
ST7920_WRITE_BYTE(0x80); //x=0
|
||||
}
|
||||
else {
|
||||
ST7920_WRITE_BYTE(0x80 | (y - 32)); //y
|
||||
ST7920_WRITE_BYTE(0x80 | 8); //x=64
|
||||
}
|
||||
ST7920_SET_DAT();
|
||||
ST7920_WRITE_BYTES(ptr, (LCD_PIXEL_WIDTH) / 8); //ptr is incremented inside of macro
|
||||
y++;
|
||||
}
|
||||
|
||||
ST7920_NCS();
|
||||
}
|
||||
break;
|
||||
}
|
||||
#if PAGE_HEIGHT == 8
|
||||
return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg);
|
||||
#elif PAGE_HEIGHT == 16
|
||||
return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg);
|
||||
#else
|
||||
return u8g_dev_pb32h1_base_fn(u8g, dev, msg, arg);
|
||||
#endif
|
||||
}
|
||||
|
||||
static uint8_t u8g_dev_st7920_128x64_custom_sw_spi_buf[(LCD_PIXEL_WIDTH) * (PAGE_HEIGHT) / 8] U8G_NOCOMMON;
|
||||
static u8g_pb_t u8g_dev_st7920_128x64_custom_sw_spi_pb = {{PAGE_HEIGHT, LCD_PIXEL_HEIGHT, 0, 0, 0}, LCD_PIXEL_WIDTH, u8g_dev_st7920_128x64_custom_sw_spi_buf};
|
||||
u8g_dev_t u8g_dev_st7920_128x64_custom_sw_spi = {u8g_dev_st7920_custom_sw_spi_128x64_fn, &u8g_dev_st7920_128x64_custom_sw_spi_pb, &u8g_com_null_fn};
|
||||
|
||||
#pragma GCC reset_options
|
||||
|
||||
#endif // U8GLIB_ST7920
|
||||
#endif // ULCDST7920_SWSPI_H
|
Loading…
Reference in New Issue